1. Field of the Invention
The present invention relates to integrated circuits, and more particularly to integrated circuits for performing a demultiplexing operation.
2. The Prior Art
In digital systems, demultiplexing circuits are common, and function effectively to distribute data available on a single input line to a plurality of output lines, each of which is selected in time sequence. Typically in such applications the input data is binary in character, so that a bit is either present or not present each time one of the output lines is selected by the demultiplexing circuit.
There are many applications in which this technique can feasibly be employed to analyze or demultiplex an analog signal, meaning a signal which is capable of representing more than a binary "on" or "off" function. With previously known circuitry, however, it has not been possible economically to perform such a function, because it has been necessary to provide extensive filtering and amplification of the demultiplexed output channels.
It is accordingly desirable to provide an inexpensive and efficient apparatus for applying demultiplexing techniques to an analog signal in order to manifest voltage values corresponding to the instantaneous amplitudes of an analog input signal at sequential times, without requiring extensive filtering.